By annie shum | June 13, 2009
Cloud computing and 3D chip manufacturing, or “stacking,” don’t appear to have much in common, but the way Gartner sees it, the two will help drive the recovery of the semiconductor sector, and also change it considerably. The firm made the predictions here as part of a semiconductor industry briefing, bringing all of its chip analysts to town from around the world to meet with chipmakers here in the Silicon Valley, like National Semiconductor and Intel.
Cloud computing will change how consumers and enterprises alike use their computing systems, causing the companies that make the chips to change as well, said Sergis Mushell, principal research analyst for semiconductor research. And despite questions of how widely used the cloud is or will be, he maintained if you use Google Gmail or Yahoo Mail, you’re on the cloud. “The cloud is here — we are using it,” he told the gathering. “Your e-mails are stored in the cloud and you do not have it on your local machine.”
For the enterprise, the desire to move to the cloud is to avoid the capital expense of new servers, trading it for just the operating expense of using someone else’s hardware. For consumers, it’s the luxury of “anytime, anywhere” computing without needing to bring your computer along.
To Gartner, the cloud will revolutionize chip demand because while client devices will need less computing performance — since the computing is done in the cloud — datacenters will need more compute power for the same reasons. That means 8-core server processors while clients can get by with mini-notebooks’ low-power processors.
It will also mean new types of cores will be needed to provide scalable and reconfigurable processor cores, with a focus on cryptographic processing to keep data secure as it goes over the wire, Mushell said.
X/Y/Z-dimension chips
Jim Walker, a research vice president for Gartner, highlighted the benefits of another emerging trend in computing: the use of 3D stacking in processor design. Semiconductors use a two-dimensional design, but as they get more complex, it becomes difficult for data to run from one end of a chip’s transistors to another. “Traditional silicon integration methods take too long,” Walker said.
So the industry borrowed a concept from circuit board industry that has been around for 30 years. Rather than spread out in an X/Y axis, they are starting to add a third dimension — depth. 3D processor design involves stacking layers of circuitry on top of each other, separated by substrates. IBM (NYSE: IBM) was the leader on this, as is often the case, and first discussed the concept two years ago.
More specifically, this technology is called 3D utilizing “thru-silicon via,” or TSV. And it’s not a foreign concept: Every motherboard and memory stick already does this, Walker noted. There are challenges to it, however — not the least of which is heat. If a chip uses five layers, how do you cool the inner layers when heatsinks only cover the outside?
Despite such hurdles, Gartner predicts that TSV will be a $20 billion market by 2013, with image sensors using this technique now, digital signal processors and various memory technologies embracing it next year, graphics chips going TSV in 2010 and multicore processors and FPGAs in 2011.
June 12, 2009, By Andy Patrizio, internetnews.com
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